
Pinout Information
MachXO Family Data Sheet
LCMXO256 and LCMXO640 Logic Signal Connections: 100 csBGA (Cont.)
LCMXO256
LCMXO640
Ball
Ball
Dual
Differen-
Ball
Ball
Dual
Differen-
Number
Function
Bank
Function
tial
Number
Function
Bank
Function
tial
A4
GNDIO0
0
A4
GNDIO0
0
B4
A3
B3
A2
C3
A1
B2
N9
B9
B5
A14
H14
P10
G1
P1
PT3A
PT2F
PT2E
PT2D
PT2C
PT2B
PT2A
GND
GND
VCCIO0
VCCIO0
VCCIO0
VCCIO1
VCCIO1
VCCIO1
0
0
0
0
0
0
0
-
-
0
0
0
1
1
1
T
C
T
C
T
C
T
B4
A3
B3
A2
C3
A1
B2
N9
B9
B5
A14
H14
P10
G1
P1
PT3B
PT3A
PT2F
PT2E
PT2B
PT2C
PT2A
GND
GND
VCCIO0
VCCIO1
VCCIO1
VCCIO2
VCCIO3
VCCIO3
0
0
0
0
0
0
0
-
-
0
1
1
2
3
3
C
T
C
T
C
T
*NC for “E” devices.
**Primary clock inputs are single-ended.
4-7